1. Field of the Invention
The present invention relates to a technology of a thin film transistor for a liquid crystal display(LCD) device, and particularly to a thin film transistor having a vertical structure and a method of fabricating the same.
2. Description of the Related Art
Generally, a liquid crystal display device is used in a television, a graphic display, etc. Particularly, an active matrix type liquid crystal device has a high-speed response property and is suitable for a display device for which a plurality of pixels are required. Therefore, it contributes to realizing a large-scale picture with high definition. Furthermore, it is applied to a lap-top computer, a portable television set, a car navigation displays(cockpit), etc., owing to a light-weighting and a low power consumption.
In such an active matrix type liquid crystal device, at the intersecting portions of a number of gate bus lines and date bus lines, a number of switching devices such as diodes, thin film transistors, etc. are arranged in order to selectively drive the pixel electrodes.
A thin film transistor includes a staggered transistor, an inversely staggered transistor, a planar type transistor and an inversely planar type transistor. In FIG. 1, the inversely staggered type thin film transistor is shown.
Referring to FIG. 1, a metal material such as chromium or aluminum, etc. is deposited to a selected thickness on the surface of a lower insulating substrate 1 and is patterned using a first mask to form a gate electrode 2 of a thin film transistor.
To make insulation with a conductive layer to be formed in later step, an insulating layer 3 made of a material such as silicon nitride is coated on the entire surface of the resultant surface in which the gate electrode 2 is formed. Then, on the surface of the insulating layer 3 is formed an amorphous silicon layer 4. The amorphous silicon layer 4 such as a-Si:H serves as a channel of a thin film transistor. An insulating material is deposited on a top surface of the amorphous silicon layer 4 and is patterned using a second mask to form an etch stopper 5. An amorphous silicon layer 6 such as N.sup.+ a-Si:H within which n-type impurity has been doped is formed on the surface of the resultant surface, wherein the amorphous silicon layer 6 serves as an ohmic layer. The amorphous silicon layers 6 and 4 are then patterned using a third mask. In this regard, the amorphous silicon layer 4 is patterned o as to obtain a minimum effective channel length such that the width of the amorphous silicon layer 4 is longer than the width of the gate electrode 2. Successively, a transparent material such as indium tin oxide is deposited on the entire surface of the resultant surface and is patterned using a fourth mask to form a pixel electrode 7. Following the formation of the pixel electrode 7, a conductive material such as aluminum, tantalum, chromium, etc. is deposited to a selected thickness on the resultant surface and is patterned using a fifth mask and a sixth mask so as to expose to a part of the etch stopper 5, forming a source 8a and a drain 8b of the thin film transistor separated from the source by a hole. At this time, the source electrode 8b is connected to the pixel electrode 7. Then, a passivation film is formed on the surface of the resultant surface in which the thin film transistor is formed according to the conventional method and is then patterned using a seventh mask to form a passivation film 9 remaining on the top surface only of the thin film transistor.
The inversely staggered type thin film transistor having the etch stopper as described above has the following drawbacks:
Firstly, to form the thin film transistor as shown in FIG. 1, seven masks (in the case that includes the step for the formation of the pad such as chromium, etc., eight masks are required) are required and the process is thus complicated.
Secondly, the amorphous silicon layer 4 which serves as the channel of the thin film transistor absorbs the incident light from a backlight unit of the lower substrate(not shown), thereby to create an optical current in the transistor. Therefore, even when the transistor is in the off-state because the outside electrical source is not applied to the gate of the transistor, a current, i.e., off-current flows through the transistor. Accordingly, a life time of the transistor in the liquid crystal display device is shortened, and a contrast ratio, a gray and a flicker phenomenon, etc., of the liquid crystal display device are affected.
Thirdly, in the inversely staggered thin film transistor, because a gate electrode and are formed in one of the lower and the upper portions and source and drain electrodes are formed oppositely to the gate electrode, the gate electrode is overlapped with the source electrode and the drain electrode. This overlap results in the creation of a parasitic capacitance between the gate electrode and the source/drain electrodes. Such a parasitic capacitance creates a residual image in a picture of the liquid crystal display device and lowers a reliability thereof.
Fourth, so as to obtain the effective channel length, a width of the amorphous silicon layer 4 serving as the channel of the thin film transistor should be larger than a width of the gate electrode. To comply with such requirement, the size of the transistor become large. There is a problem that as the size of the transistor is bigger and bigger, the aperture ratio of the liquid crystal display device decreases less and less.
Fifth, the choice for the metal material of the gate electrode 2 is limited since the metal for the gate electrode should has the following properties: it must have a low resistance so as to shorten drive delay of the liquid crystal display device; it must be attacked by a tapered etching so as to improve the step coverage; and moreover, it should not be affected by the other processes after the formation of the gate electrode 2.